A variety of home appliances including a television, refrigerator, air conditioner, etc. operate with external AC power. In addition, electronic apparatuses, including laptop computers, mobile phone terminals, tablet terminals and the like, can operate with external AC power or its built-in battery is charged with the AC power. Such home appliances and electronic apparatuses (hereinafter collectively referred to as an electronic apparatus) incorporate a switching power supply for converting a commercial AC voltage to AC/DC. Alternatively, in some cases, a switching power supply may be incorporated in an external power adapter (AC adapter) of the electronic apparatus.
The switching power supply includes a rectification circuit (diode bridge circuit) for rectifying an AC voltage, and an insulated DC/DC converter for stepping down the rectified voltage and supplying the stepped voltage to a load. When AC/DC conversion is performed with such a switching power supply, a current pulse with very high amplitude is generated. Such a current pulse causes problems such as radioactive noise, network loss and increase of total harmonic components. In order to solve these problems, a PFC (Power Factor Correction) circuit is mounted in an electronic apparatus consuming more than a predetermined power. The PFC circuit monitors an AC input voltage and an input current and makes their phases coincide with each other to make the power close to 100%.
FIGS. 1A and 1B are block diagrams of a power supply system including a PFC circuit. Referring to FIG. 1A, a power supply system 1R includes a rectification circuit 2 and a PFC circuit 100R. The rectification circuit 2 performs full-wave rectification of an AC voltage VAC. A main circuit 102 of the PFC circuit 100R has a so-called step-up DC/DC converter topology and includes an inductor L1, a switching transistor M1, a diode D1 and an output capacitor Co. The main circuit 102 steps up an input voltage VIN by the switching operation of the switching transistor M1, and generates an output voltage VOUT which is stabilized to a predetermined voltage level. In some cases, a converter using a step-down converter or a transformer is adopted as the circuit form of the main circuit 102.
A control circuit 200R monitors the input voltage VIN and an input current (inductor current) IL in addition to the output voltage VOUT to be controlled. Then, while the waveform and phase of the input current IL are controlled in a minor loop (current loop) so as to approach those of the input voltage VIN, the output voltage VOUT can approach its target voltage VOUT(REF) in a major loop (voltage loop).
FIGS. 2A and 2B are operation waveform diagrams of the PFC circuit 100R. FIG. 2A shows an average current IL(AVE) of the input current IL and the input voltage VIN. A control method of the PFC circuit 100R is largely classified into a current continuous mode (CCM), a current discontinuous mode (CDM) and a critical current mode (CRM). FIG. 2B shows an enlarged input current waveform of a part of FIG. 2A in the current continuous mode, the current discontinuous mode and the critical current mode.
Here, in many electronic apparatuses, their power consumption is dynamically changed in a range from zero to the rated power depending on their operation state. The PFC circuit 100R of FIG. 1A is suitable for applications with a rated output of about 150 W. However, when adopting the PFC circuit 100R of FIG. 1A for an apparatus with a rated output of about 400 W, it is difficult to obtain high efficiency in a load range of 0 to 400 W. For this reason, a multichannel/multi-phase DC/DC converter is introduced. FIG. 1B shows a 2-channel PFC circuit 100S. The PFC circuit 100S includes inductors L1 and L2 and switching transistors M1 and M2 corresponding to two channels CH1 and CH2. A control circuit 200S switches the two channels with a phase difference of 360°/2 (=180°). FIG. 3 is an operation waveform diagram of the PFC circuit 100S of FIG. 1B. Each channel is controlled in the current critical mode.
FIG. 4 is a graphical view showing the load current dependency of power factor and operating frequency of a PFC circuit in a current critical mode. In the current critical mode, the operating frequency f increases as the load decreases. In the current critical mode, the operating frequency f increases even when the input voltage VIN rises. The PFC circuit has a response delay depending on a circuit configuration, a circuit constant, etc. Therefore, when the operating frequency f becomes too high, the PFC circuit operates in an uncontrollable region due to the response delay, which may result in a poor power factor. In addition, an increase in the operating frequency f leads to an increase in switching loss of the switching transistor M1, which is one factor of efficiency reduction of the PFC circuit in a light load state.
In order to solve this problem, there has been proposed a technique for stopping a switching operation of one of two channels in a light load state. According to this technique, an operation frequency in the light load state becomes lower than when a two-channel operation is maintained, thereby solving the above-mentioned problem.
However, when the present inventors examined the above-described technique, they came to recognize the following problem. That is, according to the above-described technique, it is not possible to freely set a switching point between a one-phase operation mode (single-phase mode) and the two-phase operation mode. Specifically, in the above-described technique, it is difficult to set the switching point within a region higher than 50% of a maximum output power in a two-phase operation mode. Depending on applications, there are some cases where it is desired to switch a mode at any point higher than 50% of the maximum output power, in which cases it is difficult to adopt the above-described technique for such applications. This issue should not be regarded as the general perception of those skilled in the art.